Template linking and transclusion check

Checks and reports which articles that transcludes a template that are not linked from the template, and which articles that are linked from a template but do not transclude it.

.wikipedia.org
(including namespace)

Results for Template:Logica programmabile (edit)

Mismatch between transclusions and links
Transclusion but no linkLink but no transclusion

Total: 5
National Semiconductor (edit)
Altera Corporation (edit)
Signetics (edit)
Actel (edit)
Atmel (edit)

Total: 54
ARM Cortex-M (create)
ARM Holdings (edit)
Accellera (create)
Achronix (create)
Advanced Boolean Expression Language (create)
Aldec (create)
Altera Hardware Description Language (create)
Altera Nios (create)
Argonaut RISC Core (create)
C to HDL (create)
Cadence Design Systems (create)
Circuit underutilization (create)
Configurable Logic Block (create)
Cornell University Programming Language (create)
ELLA (programming language) (create)
Erasable Programmable Logic Device (create)
Flow to HDL (create)
High-level synthesis (create)
ICE (FPGA) (create)
Infineon Technologies (edit)
Intel Quartus Prime (create)
Java Optimized Processor (create)
LatticeMico32 (create)
LatticeMico8 (create)
Libre-SOC (create)
MicroBlaze (create)
Microchip Technology (edit)
ModelSim (create)
MyHDL (create)
NXP Semiconductors (edit)
Nios II (create)
OpenPOWER Microwatt (create)
OpenVera (create)
PALASM (create)
PicoBlaze (create)
Power ISA (create)
Property Specification Language (create)
Reconfigurable Computing (create)
Siemens (azienda) (edit)
Soft microprocessor (create)
Stratix (create)
Synopsys (create)
SystemVerilog DPI (create)
Unified Power Format (create)
VHDL-AMS (create)
VHDL-VITAL (create)
Verilog-A (create)
Verilog-AMS (create)
Verilog-to-Routing (create)
Virtex (FPGA) (create)
Xilinx ISE (create)
Xilinx Vivado (create)
Xputer (create)
Zet (Hardware) (create)

 Links to redirects
 

Total: 7
AMD (edit) Advanced Micro Devices (edit)
ASIC (edit) Application specific integrated circuit (edit)
Electrically Erasable Programmable Read-Only Memory (edit) EEPROM (edit)
Erasable Programmable Read Only Memory (edit) EPROM (edit)
Memoria Flash (edit) Memoria flash (edit)
Programmable Array Logic (edit) Generic Array Logic (edit)
Static Random Access Memory (edit) SRAM (edit)

Complete transclusion and link overview
Transclusions of the templateLinks from the template

Total: 36
Intel (edit)
EPROM (edit)
EEPROM (edit)
Texas Instruments (edit)
Advanced Micro Devices (edit)
Memoria flash (edit)
VHDL (edit)
Complex Programmable Logic Device (edit)
SRAM (edit)
Handel-C (edit)
Application specific integrated circuit (edit)
PSoC (edit)
Field Programmable Gate Array (edit)
LEON (edit)
OpenRISC (edit)
OpenCores (edit)
System-on-a-chip (edit)
Acceleratore (informatica) (edit)
National Semiconductor (edit)
Verilog (edit)
SystemC (edit)
Controllore logico programmabile (edit)
Programmable Logic Array (edit)
Altera Corporation (edit)
Signetics (edit)
Generic Array Logic (edit)
Xilinx (edit)
Antifusibile (edit)
Actel (edit)
Lattice Semiconductor (edit)
Gate array (edit)
Atmel (edit)
RISC-V (edit)
Mentor Graphics (edit)
Chisel (edit)
SystemVerilog (edit)

Total: 86
AMD (edit) Advanced Micro Devices (edit)
ARM Cortex-M (create)
ARM Holdings (edit)
ASIC (edit) Application specific integrated circuit (edit)
Acceleratore (informatica) (edit)
Accellera (create)
Achronix (create)
Advanced Boolean Expression Language (create)
Aldec (create)
Altera Hardware Description Language (create)
Altera Nios (create)
Antifusibile (edit)
Argonaut RISC Core (create)
C to HDL (create)
Cadence Design Systems (create)
Chisel (edit)
Circuit underutilization (create)
Complex Programmable Logic Device (edit)
Configurable Logic Block (create)
Controllore logico programmabile (edit)
Cornell University Programming Language (create)
ELLA (programming language) (create)
Electrically Erasable Programmable Read-Only Memory (edit) EEPROM (edit)
Erasable Programmable Logic Device (create)
Erasable Programmable Read Only Memory (edit) EPROM (edit)
Field Programmable Gate Array (edit)
Flow to HDL (create)
Gate array (edit)
Generic Array Logic (edit)
Handel-C (edit)
High-level synthesis (create)
ICE (FPGA) (create)
Infineon Technologies (edit)
Intel (edit)
Intel Quartus Prime (create)
Java Optimized Processor (create)
LEON (edit)
LatticeMico32 (create)
LatticeMico8 (create)
Lattice Semiconductor (edit)
Libre-SOC (create)
Memoria Flash (edit) Memoria flash (edit)
Mentor Graphics (edit)
MicroBlaze (create)
Microchip Technology (edit)
ModelSim (create)
MyHDL (create)
NXP Semiconductors (edit)
Nios II (create)
OpenCores (edit)
OpenPOWER Microwatt (create)
OpenRISC (edit)
OpenVera (create)
PALASM (create)
PSoC (edit)
PicoBlaze (create)
Power ISA (create)
Programmable Array Logic (edit) Generic Array Logic (edit)
Programmable Logic Array (edit)
Property Specification Language (create)
RISC-V (edit)
Reconfigurable Computing (create)
Siemens (azienda) (edit)
Soft microprocessor (create)
Static Random Access Memory (edit) SRAM (edit)
Stratix (create)
Synopsys (create)
System-on-a-chip (edit)
SystemC (edit)
SystemVerilog (edit)
SystemVerilog DPI (create)
Texas Instruments (edit)
Unified Power Format (create)
VHDL (edit)
VHDL-AMS (create)
VHDL-VITAL (create)
Verilog (edit)
Verilog-A (create)
Verilog-AMS (create)
Verilog-to-Routing (create)
Virtex (FPGA) (create)
Xilinx (edit)
Xilinx ISE (create)
Xilinx Vivado (create)
Xputer (create)
Zet (Hardware) (create)

Generated: Sat, 27 Apr 2024 20:01:42 UTC. Duration: 0 seconds.

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